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image sensors d a t a s h e e t ft18 1m frame transfer ccd image sensor product specification 2006 december 19 dalsa professional imaging
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 2 ? 2/3 - inch optical format ? 1m active pixels (1024h x 1024v) ? progressive scan ? excellent antiblooming ? variable electronic shutt ering ? square pixel structure ? h and v binning ? 100% optical fill factor ? high dynamic range (>60db) ? high sensitivity ? low dark current and fixed pattern noise ? low readout noise ? data rate up to 40 mhz ? frame rate up to 30 hz ? mirrored readout option ? rohs complia nt description the ft18 is a monochrome progressive - scan frame transfer image sensor offering 1k x 1k pixels at 30 frames per second through a single output buffer. the combination of high speed and a high linear dynamic range (>10 true bits at room temperature without cooling) makes this device the perfect solution for high - end real time medical x - ray, scientific, and industrial applications. a second output can be used for mirrored images. the device structure is shown in figure 1. device structure figure 1 - device structure 1024 active pixels 8 black lines 1 contour line 4 2 0 optical size: 7.68 mm (h) x 7.68 mm (v) chip size: 8.9 mm (h) x 17.0 mm (v) pixel size: 7.5 m x 7.5 m active pixels: 1024 (h) x 1024 (v) total no. of pixels: 1072 (h) x 1048 (v) optical black pixels: left: 20 right:20 timing pixels: left: 4 right:4 dummy register pixels: left: 7 right: 7 contour lines: bottom: 1 top: 4 optical black lines: bottom: 11 top: 8 2 0 image section storage section output amplifier 1072 cells output register 7 7 2096 lines 1024 active lines 4 8 black lines 11 black lines 4 contour lines
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 3 architectur e of the ft18 the ft18 consists of a shielded storage section and an open image section. both sections have the same structure with identical cells and properties. the only difference between the two sections is the optical light shield. the optical centr es of all pixels in the image section form a square grid. the charge is generated and integrated in this section. the image section is controlled by four image clocks (a1 to a4). after integration, the image charge is completely shifted to the storage sec tion. the integration time is electronically controlled by charge reset (cr). the storage section is controlled by four storage clocks (b1 to b4). an output register is located below the storage section for readout. the output register has buffers at both ends. this allows either normal or mirrored readout. transport of the pixels in the output register is controlled by three register clock phases (c1 to c3). the register can be used for vertical binning. horizontal binning can be achieved by summing pixel charges under the floating diffusion. more information can be found in the application note. figure 2 shows the detailed internal structure. image section image diagonal aspect ratio active image width x height total width x height pixel width x height geometric fill factor image clock pins capacity of each clock phase number of active lines number of contour lines number of black lines total number of lines number of active pixels per line number of overscan (timing)pixels per line number of black reference pixels per line total number of pixels per line 10.9 mm 1:1 7 .680 x 7.680 mm 2 8.040 x 7.860 mm 2 7.5 x 7.5 m 2 100% a1, a2, a3, a4 <3.75nf per pin 1024 4 (top) + 1 (bottom) 8 (top) + 11 (bottom) 1048 1024 8 (2x4) 40 (2x20) 1072 output register output buffers (three - stage source follower) number of registers numb er of register cells below storage number of extra cells to output output register horizontal transport clock pins capacitance of each c - clock phase overlap capacity between neighboring c - clocks reset gate clock phases capacity of each rg 2 1 (bidirection al below storage) 1072 2 x 7 3 (c1..c3) <85pf per pin <35pf 2 pins (rgl, rgr) <15pf storage section storage width x height cell width x height storage clock phases capacity of each b phase number of cells per line x number of lines 8.040 x 7.860 mm 2 7.5 x 7.5 m 2 b1, b2, b3, b4 <4.1nf per pin 1072 x 1048
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 4 figure 2 - detailed internal structure a1, a2, a3, a4: clocks of image section b1, b2, b3, b4: clocks of storage section c1, c2, c3: clocks of horizontal register og: output gate storage image ft ccd 12 lines 1k active image lines 12 lines one pixel 1048 storage lines outl 7 extra cells 20 black & 4 timing columns 1k image pixels 4 timing & 20 black columns 7 extra cells column 1 column 24+1 column 24+1k column 24+1k+24 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 b3 b4 b3 b4 b3 b4 b3 b4 b3 b4 b3 b3 b4 a1 a1 a1 a1 a1 b2 b1 b2 b2 b1 b1 b2 b2 b2 b1 c3 c3 c3 c3 c3 c3 c3 c3 c3 c3 c3 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 a2 a3 a4 b3 b3 b3 b4 b3 b4 b3 b4 b3 b3 b4 a1 a1 a1 a1 a1 b2 b1 b2 b2 b1 b1 b2 b1 b2 b2 b1 og c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 c2 c1 og a1 a1
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 5 specifications absolute maximum ratings min max unit general: storage temperature - 55 +80 oc ambient temperature during operation - 40 +60 oc voltage between any two gates - 20 +20 v dc current through any clock (absolute value) - 0.2 +0.2 a out current (no short circuit protection) 0 +6 ma voltages in relation to vns: vps, sfs - 30 + 0.5 v sfd -8 +8 v rd - 15 +0.5 v all other pins - 32 +0.5 v voltages in relation to vps: vns - 0.5 +30 v sfd, rd +0 +30 v sfs -8 +8 v all other pins - 20 +20 v dc conditions 1 min [v] typical [v] max [v] unit vns 2 n substrate 16 adjusted 24 v vps p well 2 4 6 v sfd source follower drain 18 20 22 v sfs source follower source - 0 - v vcs current source gate -2 0 3 v og output gate 3 5.4 8 v rd reset drain 12 13 15 v ac clock level conditions 1 min typical max unit image clocks (duty cycl e = 5/8) a- clock swing 9.5 10 - v a- clock low level - 0 - v charge reset (cr) level on a - clocks 3 - -5 - v charge pump (cp) level on a - clocks - 0 - v storage clocks (duty cycle = 5/8) b- clock swing 9.5 10 - v b- clock low level - 0 - v output register clocks (duty cycle = 1/2) c- clock swing - 5 - v c- clock low level - 3 - v other clocks: reset gate (rg) swing - 10 12 v reset gate (rg) low level - 1 - v 1 all voltages in relation to sfs. 2 to set the vns voltage for optimal vert ical antiblooming (vab), it should be adjustable between minimum and maximum values. 3 guaranteed charge requires the cr voltage to last at least 1.2s.
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 6 timing diagrams (for default operation) figure 3 ? line and pixel timing diagrams h l h l h l c1 c2 c3 t p/ 6 = ( 1 /3 6mhz) / 6 = 4 .63 ns d u m m y 1 . . . . . . . d u m m y 7 b l a c k 1 . . . . . . . b l a c k 2 0 t i m i n g 1 t i m i n g 4 p i x e l 1 . . . . . . . p i x e l 1 0 2 4 t i m i n g 1 t i m i n g 4 b l a c k 1 . . . . . . . b l a c k 2 0 d u m m y 1 h l rg tp = 1/3 6mhz = 27 .8 ns . . . . . . . . . . . . . . in this figure, charge is transport ed to the left output buf fer (normal readout) by moving it from c1 t o c2 to c3 etc. by exchanging the timing of c1 and c2, charge will be transported to the right output buf fer (mirrored readout). a1 a2 a3 a4 phase or pixel count 1100 1110 1120 1130 1140 10 20 30 40 50 60 70 80 90 100 110 120 l h l h l h l h b2 b3 b 4 b1 l h l h l h l h 19 64 28 37 46 55 32 62 26 4 4 38 56 20 50 ssc l h 72 1150 0 0 one cycle of the storage gates (during line blanking), moving one line from storage to output register c clocks stop ped f or 2 microseconds l h pb 0 l h blc 0 79 79 l h cb 1131 99 1080 pixels until 1152 1/(36mhz) = 27.8ns one charge pumping cycle of the image gates (during line blanking), shifting the charge of one line back and forth start-stop c-clocks pre-blanking black level clamp composite blanking l cr 19 64 charge reset h 1.25 microseconds ac characteristics min. typical max. unit horizontal frequency (1/tp)) vertical frequency - line timing pixel timing - 36 750 40 833 mh z khz
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 7 a2 l h a3 l h a4 l h 1 2 1048 1047 b1 l h b2 l h b3 l h b4 l h 1 2 1048 1047 48 tp 750khz 18tp 30tp for all a and b clocks, duty cy cle = 5/8 1109 1110 11 11 1112 1113 1114 1115 1116 1119 1120 1121 1122 . .. .. . 1250 1 ...... 26 27 ...... 70 71 72 73 74 75 76 77 78 79 8 0 81 82 83 8 6 87 1 023 1024 cdbbbb bbbd i nt ernal line c ount er eeeebbblcblcbbddc c1 v ideo line no. a1 a2 a3 a4 l h l h l h l h b1 b2 b3 b4 l h l h l h l h cr bl c ssc pb l h l h l h l h by adding one cr-pulse during the horizontal blanking, the effective integration time is decreased: "electronic shuttering" cb l h cr before nominal integration ...... ...... 88 2 c harge image (all lines) is moved from image to storage b y the image and storage clocks together (see figure "frame shift timing"). f ra me tr ansfe r (ft): charge pump (cp): a measure to reduce dark current due to interface states. for details see figur e 3 "line and pixel timing diagrams". h ustle: moving the char ge packets of one line from storage to the output register. f or details see figure 3 "line and pix el timing diagr ams". l inetime: the c-clocks shift charge packets one-by-one to the selected output buffer. for details see figure 3 "line and pixel timing diagrams". bl ack- le vel clamp (blc): the v ide o pr oce ss ing cl amps the black li nes to de ter mi ne i ts output ze ro-l e vel. figure 4: frame timing diagrams frame timing frame shift timing tp=1/(36mhz=27.8ns
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 8 performance the performance of the ft18 is descri bed using modes of operation with 25fps or 30fps respectively. measurements for the ft18 are done under the following circumstances (values in brackets apply to the 30fps mode): ? vns is adjusted as low as possible while maintaining proper vertical antibloom ing ? integration takes place under 2 gates with 10v clock swing during 40ms (33.33ms) ? the vertical transport or frame shift frequency equals 750khz (714khz) ? the horizontal transport or readout frequency equals 36mhz (40mhz) ? the rms readout noise of the o utput buffers and the fpn are measured in the bandwidth 0.1 - 18mhz (0.1 - 20mhz) ? the performance in dark is given at a temperature of 318k/45c. note that the dark current decreases by a factor of two for every decrease of temperature of approximately 10c. linear / saturation min typical max unit overexposure over entire area while maintaining good vab 300 - - lux vertical resolution (mtf) @ 67 lp/mm 25 - - % quantum efficiency @ 450 nm 10 11 - % quantum efficiency @ 520 nm 21 22 - % quantum efficie ncy @ 600 nm 18 19 - % quantum efficiency @ 800 (near ir) 5 - - % image lag - 0 - % white shading 1 - - 2.5 % random non - uniformity (rnu) 2 - 1.0 1.4 % full - well capacity floating diffusion (fd) 120 - - kel. full - well capacity saturation level (q max ) 3 image 40 45 - kel. full - well capacity saturation level (q max ) storage 45 - - kel. full - well capacity saturation level (q max ) output register 4 90 - - kel. 25 frames / sec mode only sensitivity @ 3200k without ir cut - off filter 5.6 5.8 - kel/lux sm ear without shutter 5 - - 0.39 % dynamic range 60 63.8 - db rms readout noise - 29 38 el 30 frames / sec mode only sensitivity @ 3200k without ir cut - off filter 4.6 4.8 - kel/lux smear without shutter 5 - - 0.40 % dynamic range 60 63.5 - db rms re adout noise - 30 40 el 1 white shading is defined as the ratio of one - value of an 8x8 pixel blurred image (low - pass) to the mean signal value . 2 random non uniformity is defined as the ratio of one - value of the high - pass image to the mean signal value at nominal light . 3 q max is determined from the low - pass filtered image . 4 q max of the output register may be increased up to 200kel . in this case, the charge packets of the pixels get mixed in the output register during horizontal transport. this may redu ce the number of times that the output register needs to be read out if lines are read out solely to be dumped. 5 the smear condition is: overexposure with a spot with a height of 10% of the image height (approx. 100 lines) .
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 9 400 500 600 700 800 900 30 20 10 0 q u a n t u m e f f i c i e n c y ( % ) wavelength (nm) figure 5 ? quantum ef ficiency versus wavelength
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 10 output buffers min typical max unit conversion factor 8.5 10 11.5 v/el. supply current - 4 - ma bandwidth - 110 - mhz output impedance buffer (r load =3.3k , c load =2pf) - 400 - dark condition min typical max unit dark current - - 240 pa/cm 2 black level offset 1 - - 25 el dark condition at 25 frames/sec: average dark signal - 56 67 el shot noise on the dark current - - 10 el horizontal shading - - 25 el vertical shading - - 66 el fixed pattern noise 2 in dark (fpn) - - 19 el dark condition at 30 frames/ sec: average dark signal - 47 56 el shot noise on the dark current - - 10 el horizontal shading - - 25 el vertical shading - - 56 el fixed pattern noise 2 in dark (fpn) - - 19 el 1 black level offset is defined as the difference in dark signal of a black reference and an active image line. 2 fpn is the one - value of the high - pass image.
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 11 application information current handling one of the purposes of vps is to drain the holes that are generated during exposure of the sensor to light. free e lectrons are either transported to the vrd connection and, if excessive (from overexposure), free electrons are drained to vns. no current should flow into any vps connection of the sensor. during high overexposure a total current of 10 to 15ma through all vps connections together may be expected. the pnp emitter follower in the circuit diagram (figure 6) serves these current requirements. vns drains superfluous electrons as a result of overexposure. in other words, it only sinks current. during high overe xposure a total current of 10 to 15ma through all vns connections together may be expected. the npn emitter follower in the circuit diagram meets these current requirements. decoupling of dc voltages all dc voltages should be decoupled with a100nf decoupl ing capacitor. this capacitor must be mounted as close as possible to the sensor pin. further noise reduction (by bandwidth limiting) is achieved by the resistors in the connections between the sensor and its voltage supplies. the electrons that build up t he charge packets that will reach the floating diffusions only add up to a small current, which will flow through vrd. therefore, a large series resistor in the vrd connection may be used. outputs to limit the on - chip power dissipation, the output buffers are designed with open source outputs. outputs to be used should therefore be loaded with a current source or more simply with a resistance to gnd. in order to prevent the output (which typically has an output impedance of about 400 ) from bandwidth limit ation as a result of capacitive loading, load the output with an emitter follower built from a high - frequency transistor. mount the base of this transistor as close as possible to the sensor and keep the connection between the emitter and the next s tage short. the ccd output buffer can easily be destroyed by esd. by using this emitter follower, this danger is suppressed; do not reintroduce this danger by measuring directly on the output pin of the sensor with an oscilloscope probe. instead, measure o n the output of the emitter follower. slew rate limitation is avoided by avoiding a too - small quiescent current in the emitter follower; about 10ma should do the job. the collector of the emitter follower should be uncoupled properly to suppress the miller effect from the base - collector capacitance. a ccd output load resistor of 3.3k typically results in a bandwidth of 110mhz. the bandwidth can be enlarged to about 130mhz by using a resistor of 2.2k instead, which, however, also enlarges the on - chip power dissipation. device protection the output buffers of the ft18 are likely to b e damaged if vps rises above sfd or rd at any time. this danger is most realistic during power - on or power - off of the camera. the rd voltage should always be lower than the sfd voltage. never exceed the maximum output current. this may damage the device permanently. the maximum output current should be limited to 6ma. be especially aware that the output buffers of these image sensors are very sensitive to esd damage. because of the fact that our ccds are built on an n - type substrate, we are dealing wi th some parasitic npn transistors. to avoid activation of these transistors during switch - on and switch - off of the camera, we recommend the application diagram of figure 6. device handling an image sensor is a mos device which can be destroyed by elec tro - static discharge (esd). therefore, the device should be handled with care. always store the device with short - circuiting clamps or on conductive foam. always switch off all electric signals when inserting or removing the sensor into or from a camera (the esd protection in the ccd image sensor process is less effective than the esd protection of standard cmos circuits). being a high quality optical device, it is important that the cover glass remain undamaged. when handling the sensor, use fingercots . when cleaning the coverglass we strongly recommend using ethanol. use of other liquids is strongly discouraged: ? if the cleaning liquid evaporates too quickly, rubbing is likely to cause esd damage. ? the cover glass and its coating can be damaged by o ther liquids. rub the window carefully and slowly. dry rubbing of the window may cause electro - static charges or scratches which can destroy the device.
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 12 bc 860c bc 850c vns 1 0 0 n f 1 0 0 n f 1 0 0 n f bc 850c 0 . 5 - 1 m a 27 1 5 10k 0 . 5 - 1 m a vcs vog 10k out < 7 p f ! keep short <10mm! keep short output for preprocessing bfr 92a 1 k 3 . 3 k 1 0 m a 1 0 0 n f 1 0 0 n f bat74 0 . 5 - 1 m a bat74 schottky! vsfd sfd vps vrd bat74 schottky! 1 0 0 n f figure 6 ? application diagram to protect the ft18
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 13 pin configuration the ft18 is mounted in a ceramic dil 32 - pin package. the position of pi n 1 is marked with a white dot on top of the package. v ns v ns vps v ps sfdl sfdr s fsl sfsr vcsl vcsr ogl o gr rdl rdr a 1 a2 a 3 a 4 b1b 2 b3 b4c 1 c1 c2 c2 c3 c3 rgl rgr outl outr n substrate n substrate p well p well s ource follower drain left source follower drain right source follower source left s ource follower source right current source gate left c urrent source gate right output gate left output gate right r eset drain left reset drain right image clock (phase 1) i mage clock (phase 2) image clock (phase 3) image clock (phase 4) s torage clock (phase 1) storage clock (phase 2) storage clock (phase 3) storage clock (phase 4) register clock (phase 1) register clock (phase 1) register clock (phase 2) register clock (phase 2) register clock (phase 3) register clock (phase 3) reset gate left reset gate right output left output right 1 2 215 2 8 9 248 257 26 6 2 7 11 223 4 30 291 2 32 31 14 19 15 18 16 17 13 20 10 23 pinning symbol name pin #
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 14 top image storage ft18 b1 b2 a1 a2 vps ogl vcsl sfsl sfdl outl rdl vns rgl c1 c2 c3 b3 b4 a3 a4 vps ogr vcsr sfsr sfdr outr rdr vns rgr c1 c2 c3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 23 4 5 6 7 8 9 10 11 12 13 14 15 16 figure 7 ? ft18 pin configuration (top view)
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 15 package information figure 8 ? mechanical drawing of the ft18 package
dalsa professional imaging product specification 1m frame transfer ccd image senso r ft18 december 19, 2006 16 order codes the sensor can be ordered using the following codes: ft18 sensors description quality grade order code ft18/tg ft18/ ig ft18/hg ft18/sg test grade industrial grade high grade selected grade 9922 157 32031 9922 157 32021 9922 157 32011 9922 157 32001 defect specifications the ccd image sensor can be ordered in a specific quality grade. the grading is defined with the maximum amount of pixel defects, column defects, row defects and cluster defects, in both illuminated and non - illuminated conditions. for detailed grading information, please contact your local dalsa representative. for more information for more detailed information on this and other products, contact your local rep or visit our web site at http://www.dalsa.com/pi/products . dalsa professional imaging sales department high tech campus 12a 5656 ae eindhoven the netherlands tel: +31 40 2745110 fax: +31 40 2743650 www.dalsa.com/pi sales.sensors@dalsa.com this information is subject to change without notice.

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